Introduction Pinnacle 1.2 presents the first direct circuit-level simulations demonstrating logical error rates low enough for RSA-2048 factoring, enabled by Crevasse, our new QLDPC decoder. Combining this validation with circuit optimisations, we find that factoring can be performed at a spacetime cost an order of magnitude lower than estimated in Pinnacle 1.0 , without changing the underlying architecture. Crevasse has a mean decoding time of four microseconds per round of error correction.