Designing a System-on-Chip (SoC) typically involves a lot of reuse, as CPU cores and I/O peripherals are rarely built completely from scratch, but rather gradually enhanced and integrated into different configurations.
Some time ago, CHIPS Alliance member Antmicro introduced a versatile, user-friendly framework for digital design aggregation called Topwrap, which lets you assemble ASIC designs from building blocks. Topwrap’s capabilities have since been significantly improved, including a number of features supporting module-based flows and managing interconnects, making the tool an interesting option