Analyze Verilator processes and ASTs with the astsee suite

Among other things, Antmicro’s work towards improving the vertical integration potential of customers designing ASIC solutions often sees them enhance one of the flagship open source projects in this space, Verilator which complements - and in fact is often used alongside - Antmicro’s own functional simulation framework, Renode . Besides contributing bug fixes and other quality-of-life improvements into Verilator, Antmicro also develops new functionalities that expand its use cases towards e.g. UVM verification and continuously improve overall performance .